7 research outputs found

    Photonic Reconfigurable Accelerators for Efficient Inference of CNNs with Mixed-Sized Tensors

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    Photonic Microring Resonator (MRR) based hardware accelerators have been shown to provide disruptive speedup and energy-efficiency improvements for processing deep Convolutional Neural Networks (CNNs). However, previous MRR-based CNN accelerators fail to provide efficient adaptability for CNNs with mixed-sized tensors. One example of such CNNs is depthwise separable CNNs. Performing inferences of CNNs with mixed-sized tensors on such inflexible accelerators often leads to low hardware utilization, which diminishes the achievable performance and energy efficiency from the accelerators. In this paper, we present a novel way of introducing reconfigurability in the MRR-based CNN accelerators, to enable dynamic maximization of the size compatibility between the accelerator hardware components and the CNN tensors that are processed using the hardware components. We classify the state-of-the-art MRR-based CNN accelerators from prior works into two categories, based on the layout and relative placements of the utilized hardware components in the accelerators. We then use our method to introduce reconfigurability in accelerators from these two classes, to consequently improve their parallelism, the flexibility of efficiently mapping tensors of different sizes, speed, and overall energy efficiency. We evaluate our reconfigurable accelerators against three prior works for the area proportionate outlook (equal hardware area for all accelerators). Our evaluation for the inference of four modern CNNs indicates that our designed reconfigurable CNN accelerators provide improvements of up to 1.8x in Frames-Per-Second (FPS) and up to 1.5x in FPS/W, compared to an MRR-based accelerator from prior work.Comment: Paper accepted at CASES (ESWEEK) 202

    A Silicon Nitride Microring Based High-Speed, Tuning-Efficient, Electro-Refractive Modulator

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    The use of the Silicon-on-Insulator (SOI) platform has been prominent for realizing CMOS-compatible, high-performance photonic integrated circuits (PICs). But in recent years, the silicon-nitride-on-silicon-dioxide (SiN-on-SiO2_2) platform has garnered increasing interest as an alternative to the SOI platform for realizing high-performance PICs. This is because of its several beneficial properties over the SOI platform, such as low optical losses, high thermo-optic stability, broader wavelength transparency range, and high tolerance to fabrication-process variations. However, SiN-on-SiO2_2 based active devices such as modulators are scarce and lack in desired performance, due to the absence of free-carrier based activity in the SiN material and the complexity of integrating other active materials with SiN-on-SiO2_2 platform. This shortcoming hinders the SiN-on-SiO2_2 platform for realizing active PICs. To address this shortcoming, we demonstrate a SiN-on-SiO2_2 microring resonator (MRR) based active modulator in this article. Our designed MRR modulator employs an Indium-Tin-Oxide (ITO)-SiN-ITO thin-film stack, in which the ITO thin films act as the upper and lower claddings of the SiN MRR. The ITO-SiN-ITO thin-film stack leverages the free-carrier assisted, high-amplitude refractive index change in the ITO films to effect a large electro-refractive optical modulation in the device. Based on the electrostatic, transient, and finite difference time domain (FDTD) simulations, conducted using photonics foundry-validated tools, we show that our modulator achieves 280 pm/V resonance modulation efficiency, 67.8 GHz 3-dB modulation bandwidth, ∼\sim19 nm free-spectral range (FSR), ∼\sim0.23 dB insertion loss, and 10.31 dB extinction ratio for optical on-off-keying (OOK) modulation at 30 Gb/s

    Plastic total internal reflection-based photoluminescence device for enzymatic biosensors, A

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    2013 Spring.Includes bibliographical references.Growing concerns for quality of water, food and beverages in developing and developed countries drive sizeable markets for mass-producible, low cost devices that can measure the concentration of contaminant chemicals in water, food, and beverages rapidly and accurately. Several fiber-optic enzymatic biosensors have been reported for these applications, but they exhibit very strong presence of scattered excitation light in the signal for sensing, requiring expensive thin-film filters, and their non-planar structure makes them challenging to mass-produce. Several other planar optical waveguide-based biosensors prove to be relatively costly and more fragile due to constituent materials and the techniques involved in their fabrication. So, a plastic total internal reflection (TIR)-based low cost, low scatter, field-portable device for enzymatic biosensors is fabricated and demonstrated. The design concept of the TIR-based photoluminescent enzymatic biosensor device is explained. An analysis of economical materials with appropriate optical and chemical properties is presented. PMMA and PDMS are found to be appropriate due to their high chemical resistance, low cost, high optical transmittance and low auto-fluorescence. The techniques and procedures used for device fabrication are discussed. The device incorporated a PMMA-based optical waveguide core and PDMS-based fluid cell with simple multi-mode fiber-optics using cost-effective fabrication techniques like molding and surface modification. Several techniques of robustly depositing photoluminescent dyes on PMMA core surface are discussed. A pH-sensitive fluorescent dye, fluoresceinamine, and an O2-sensitive phosphorescent dye, Ru(dpp) both are successfully deposited using Si-adhesive gel-based as well as HydroThane-based deposition methods. Two different types of pH-sensors using two different techniques of depositing fluoresceinamine are demonstrated. Also, the effect of concentration of fluoresceinamine-dye molecules on fluorescence intensity and scattered excitation light intensity is investigated. The fluorescence intensity to the scattered excitation light intensity ratio for dye deposition is found to increase with increase in concentration. However, both the absolute fluorescence intensity and absolute scatter intensity are found to decrease in different amounts with an increase in concentration. An enzymatic hydrogen peroxide (H2O2) sensor is made and demonstrated by depositing Ruthenium-based phosphorescent dye (Ru(dpp)3) and catalase-enzyme on the surface of the waveguide core. The O2-sensitive phosphorescence of Ru(dpp)3 is used as a transduction signal and the catalase-enzyme is used as a bio-component for sensing. The H2O2 sensor exhibits a phosphorescence signal to scattered excitation light ratio of 100±18 without filtering. The unfiltered device demonstrates a detection limit of (2.20±0.6) µM with the linear range from 200µM to 20mM. An enzymatic lactose sensor is designed and characterized using Si-adhesive gel based Ru(dpp)3 deposition and oxidase enzyme. The lactose sensor exhibits the linear range of up to 0.8mM, which is too small for its application in industrial process control. So, a flow cell-based sensor device with a fluid reservoir is proposed and fabricated to increase the linear range of the sensor. Also, a multi-channel pH-sensor device with four channels is designed and fabricated for simultaneous sensing of multiple analytes

    Design and optimization of emerging interconnection and memory subsystems for future manycore architectures

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    2018 Summer.Includes bibliographical references.With ever-increasing core count and growing performance demand of modern data-centric applications (e.g., big data and internet-of-things (IoT) applications), energy-efficient and low-latency memory accesses and data communications (on and off the chip) are becoming essential for emerging manycore computing systems. But unfortunately, due to their poor scalability, the state-of-the-art electrical interconnects and DRAM based main memories are projected to exacerbate the latency and energy costs of memory accesses and data communications. Recent advances in silicon photonics, 3D stacking, and non-volatile memory technologies have enabled the use of cutting-edge interconnection and memory subsystems, such as photonic interconnects, 3D-stacked DRAM, and phase change memory. These innovations have the potential to enhance the performance and energy-efficiency of future manycore systems. However, despite the benefits in performance and energy-efficiency, these emerging interconnection and memory subsystems still face many technology-specific challenges along with process, environment, and workload variabilities, which negatively impact their reliability overheads and implementation feasibility. For instance, with recent advances in silicon photonics, photonic networks-on-chip (PNoCs) and core-to-memory photonic interfaces have emerged as scalable communication fabrics to enable high-bandwidth, energy-efficient, and low-latency data communications in emerging manycore systems. However, these interconnection subsystems still face many challenges due to thermal and process variations, crosstalk noise, aging, data-snooping Hardware Trojans (HTs), and high overheads of laser power generation, coupling, and distribution, all of which negatively impact reliability, security, and energy-efficiency. Along the same lines, with the advent of through-silicon via (TSV) technology, 3D-stacked DRAM architectures have emerged as small-footprint main memory solutions with relatively low per-access latency and energy costs. However, the full potential of the 3D-stacked DRAM technology remains untapped due to thermal- and scaling-induced data instability, high leakage, and high refresh rate problems along with other challenges related to 3D floorplanning and power integrity. Recent advances have also enabled Phase Change Memory (PCM) as a leading technology that can alleviate the leakage and scalability shortcomings of DRAM. But asymmetric write latency and low endurance of PCM are major challenges for its widespread adoption as main memory in future manycore systems. My research has contributed several solutions that overcome multitude of these challenges and improve the performance, energy-efficiency, security, and reliability of manycore systems integrating photonic interconnects and emerging memory (3D-stacked DRAM and phase change memory) subsystems. The main contribution of my thesis is a framework for the design and optimization of emerging interconnection and memory subsystems for future manycore computing systems. The proposed framework synergistically integrates layer-specific enhancements towards the design and optimization of emerging main memory, PNoC, and inter-chip photonic interface subsystems. In addition to subsystem-specific enhancements, we also combine enhancements across subsystems to more aggressively improve the performance, energy-efficiency, and reliability for future manycore architectures

    DyPhase: A Dynamic Phase Change Memory Architecture With Symmetric Write Latency and Restorable Endurance

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